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Phase Change Memory
As conventional memory technologies such as DRAM and Flash run into scaling challenges, architects and system designers are forced to look at alternative technologies for building future computer systems. This synthesis lecture begins by listing the requirements for a next generation memory technology and briefly surveys the landscape of novel non-volatile memories. Among these, Phase Change Memory (PCM) is emerging as a leading contender, and the authors discuss the material, device, and circuit advances underlying this exciting technology. The lecture then describes architectural solutions to enable PCM for main memories. Finally, the authors explore the impact of such byte-addressable non-volatile memories on future storage and system designs. Table of Contents: Next Generation Memory Technologies / Architecting PCM for Main Memories / Tolerating Slow Writes in PCM / Wear Leveling for Durability / Wear Leveling Under Adversarial Settings / Error Resilience in Phase Change Memories / Storage and System Design With Emerging Non-Volatile Memories
Materials and Processes for Nonvolatile Memories: Volume 830
The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners.
JJAP
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Scalability and Reliability of Phase Change Memory
Various memory devices are being widely used for a wide range of applications. There has not been any universal memory device so far because each memory device has a unique set of features. Large performance gaps in various dimensions of features between memory devices and a new set of features required by new electronic systems such as portable electronics open up new opportunities for new memory devices to emerge as mainstream memory devices. Besides, the imminent scaling limit for existing mainstream memory devices also motivates development and research of new memory devices which can meet the increasing demand for large memory capacity. Phase change memory (PCM) is one of the most promi...
On-Chip Training NPU - Algorithm, Architecture and SoC Design
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.
