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Hybrid Systems: Computation and Control
This volume contains the proceedings of the Second International Workshop on Hybrid Systems: Computation and Control (HSCC’99) to be held March 29- 31, 1999, in the village Berg en Dal near Nijmegen, The Netherlands. The rst workshop of this series was held in April 1998 at the University of California at Berkeley. The series follows meetings that were initiated by Anil Nerode at Cornell University. The proceedings of those meetings were published in the Springer-Verlag LNCS Series, Volumes 736, 999, 1066, 1201, and 1273. The p- ceedings of the rst workshop of the new series was published in LNCS 1386. The focus of the workshop is on modeling, control, synthesis, design, and ve- cation of ...
Asynchronous Pulse Logic
This comprehensive analysis of a newly developed asynchronous circuit family covers circuit theory, practical circuits, design tools and an example of the design of a simple asynchronous microprocessor using the circuit family.
Integrated Circuit and System Design
This book constitutes the refereed proceedings of the 14th International Workshop on Power and Timing Optimization and Simulation, PATMOS 2004, held in Santorini, Greece in September 2004. The 85 revised papers presented together with abstracts of 6 invited presentations were carefully reviewed and selected from 152 papers submitted. The papers are organized in topical sections on buses and communication, circuits and devices, low power issues, architectures, asynchronous circuits, systems design, interconnect and physical design, security and safety, low-power processing, digital design, and modeling and simulation.
Automated Technology for Verification and Analysis
This volume contains the papers presented at the 7th International Symposium on Automated Technologyfor Veri?cation and Analysis held during October 13- 16 in Macao SAR, China. The primary objective of the ATVA conferences - mains the same: to exchangeand promote the latest advances of state-of-the-art researchon theoretical and practical aspects of automated analysis, veri?cation, and synthesis. Among 74 research papers and 10 tool papers submitted to ATVA 2009, the Program Committee accepted 23 as regular papers and 3 as tool papers. In all, 33 experts from 17 countries worked hard to make sure that every submission received a rigorous and fair evaluation. In addition, the program included...
Designing Correct Circuits
The papers compiled in this volume cover a wide range of topics within the general area of provably correct design, including proofs of fundamental results, post hoc formal verification of designs and design techniques where correctness is ensured by construction. The papers are unique in that they demonstrate the use of design techniques for designing real chips. The book should, thus, not be missed by students and researchers interested in the deployment of formally-based techniques on real problems within a great diversity of application areas. Application areas treated within the volume range from packet-routers, arbiters, multiprocessors, serial-parallel converters and CPUs - to arithmetic units and counters. A significant group of the papers is concerned with the special requirements of asynchronous and delay-insensitive design.
Digital Integrated Circuit Design
This practical, tool-independent guide to designing digital circuits takes a unique, top-down approach, reflecting the nature of the design process in industry. Starting with architecture design, the book comprehensively explains the why and how of digital circuit design, using the physics designers need to know, and no more.
VLSI for Artificial Intelligence and Neural Networks
This book is an edited selection of the papers presented at the International Workshop on VLSI for Artifidal Intelligence and Neural Networks which was held at the University of Oxford in September 1990. Our thanks go to all the contributors and especially to the programme committee for all their hard work. Thanks are also due to the ACM-SIGARCH, the IEEE Computer Society, and the lEE for publicizing the event and to the University of Oxford and SUNY-Binghamton for their active support. We are particularly grateful to Anna Morris, Maureen Doherty and Laura Duffy for coping with the administrative problems. Jose Delgado-Frias Will Moore April 1991 vii PROLOGUE Artificial intelligence and neur...
Theorem Proving in Higher Order Logics
This volume is the proceedings of the 13th International Conference on Theo rem Proving in Higher Order Logics (TPHOLs 2000) held 14-18 August 2000 in Portland, Oregon, USA. Each of the 55 papers submitted in the full rese arch category was refereed by at least three reviewers who were selected by the program committee. Because of the limited space available in the program and proceedings, only 29 papers were accepted for presentation and publication in this volume. In keeping with tradition, TPHOLs 2000 also offered a venue for the presen tation of work in progress, where researchers invite discussion by means of a brief preliminary talk and then discuss their work at a poster session. A su...
Correct Hardware Design and Verification Methods
This volume contains the proceedings of CHARME 2001, the Eleventh Advanced Research Working Conference on Correct Hardware Design and Veri?cation Methods. CHARME 2001 is the 11th in a series of working conferences devoted to the development and use of leading-edge formal techniques and tools for the design and veri?cation of hardware and hardware-like systems. Previous events in the ‘CHARME’ series were held in Bad Herrenalb (1999), Montreal (1997), Frankfurt (1995), Arles (1993), and Torino (1991). This series of meetings has been organized in cooperation with IFIP WG 10.5 and WG 10.2. Prior meetings, stretching backto the earliest days of formal hardware veri?cation, were held under va...
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
This book constitutes the refereed proceedings of the 16th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2006. The book presents 41 revised full papers and 23 revised poster papers together with 4 key notes and 3 industrial abstracts. Topical sections include high-level design, power estimation and modeling memory and register files, low-power digital circuits, busses and interconnects, low-power techniques, applications and SoC design, modeling, and more.
