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This book is about various adaptive and dynamic techniques used to optimize processor power and performance. It is based on a very successful forum at ISSCC which focused on Adaptive Techniques. The book looks at the underlying process technology for adaptive designs and then examines different circuits, architecture and software that address the different aspects. The chapters are written by people both in academia and the industry to show the scope of alternative practices.
This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. It describes SAT-based model checking approaches and gives engineering details on what makes model checking practical. The book brings together the various SAT-based scalable emerging technologies and techniques covered can be synergistically combined into a scalable solution.
This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.
This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.
This book compiles and presents the research results from the past five years in mm-wave Silicon circuits. This area has received a great deal of interest from the research community including several university and research groups. The book covers device modeling, circuit building blocks, phased array systems, and antennas and packaging. It focuses on the techniques that uniquely take advantage of the scale and integration offered by silicon based technologies.
This book explains the physics and properties of multi-gate field-effect transistors (MuGFETs), how they are made and how circuit designers can use them to improve the performances of integrated circuits. It covers the emergence of quantum effects due to the reduced size of the devices and describes the evolution of the MOS transistor from classical structures to SOI (silicon-on-insulator) and then to MuGFETs.