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Hardware Security
Hardware Security: A Hands-On Learning Approach provides a broad, comprehensive and practical overview of hardware security that encompasses all levels of the electronic hardware infrastructure. It covers basic concepts like advanced attack techniques and countermeasures that are illustrated through theory, case studies and well-designed, hands-on laboratory exercises for each key concept. The book is ideal as a textbook for upper-level undergraduate students studying computer engineering, computer science, electrical engineering, and biomedical engineering, but is also a handy reference for graduate students, researchers and industry professionals. For academic courses, the book contains a ...
Low-Power Variation-Tolerant Design in Nanometer Silicon
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
Fundamentals of IP and SoC Security
This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the “trenches” of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.
Introduction to Hardware Security and Trust
This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade. Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems. This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of, and trust in, modern society’s microelectronic-supported infrastructures.
Explainable AI for Cybersecurity
This book provides a comprehensive overview of security vulnerabilities and state-of-the-art countermeasures using explainable artificial intelligence (AI). Specifically, it describes how explainable AI can be effectively used for detection and mitigation of hardware vulnerabilities (e.g., hardware Trojans) as well as software attacks (e.g., malware and ransomware). It provides insights into the security threats towards machine learning models and presents effective countermeasures. It also explores hardware acceleration of explainable AI algorithms. The reader will be able to comprehend a complete picture of cybersecurity challenges and how to detect them using explainable AI. This book serves as a single source of reference for students, researchers, engineers, and practitioners for designing secure and trustworthy systems.
Hardware IP Security and Trust
This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs.
Computing with Memory for Energy-Efficient Robust Systems
This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms.
Behavioral Synthesis for Hardware Security
This book presents state-of-the-art research results from leading electronic design automation (EDA) researchers on automated approaches for generating cyber-secure, smart hardware. The authors first provide brief background on high-level synthesis principles and motivate the need for secure design during behavioral synthesis. Then they provide readers with synthesis techniques for six automated security solutions, namely, hardware obfuscation, hardware Trojan detection, IP watermarking, state encoding, side channel attack resistance, and information flow tracking. Provides a single-source reference to behavioral synthesis for hardware security; Describes automatic synthesis techniques for algorithmic obfuscation, using code transformations; Includes behavioral synthesis techniques for intellectual property protection.
Cryptographic Hardware and Embedded Systems - CHES 2009
CHES 2009, the 11th workshop on Cryptographic Hardware and Embedded Systems, was held in Lausanne, Switzerland, September 6–9, 2009. The wo- shop was sponsored by the International Association for Cryptologic Research (IACR). The workshop attracted a record number of 148 submissions from 29 co- tries, of which the Program Committee selected 29 for publication in the wo- shop proceedings, resulting in an acceptance rate of 19.6%, the lowest in the history of CHES. The review process followed strict standards: each paper - ceived at least four reviews, and some asmanyaseightreviews.Membersofthe Program Committee were restricted to co-authoring at most two submissions, and their papers were e...
Security Aspects in Information Technology
This book constitutes the refereed proceedings of the First International Conference on Security Aspects in Information Technology, High-Performance Computing and Networking held in Haldia, India, in October 2011. The 14 full papers presented together with the abstracts of 2 invited lectures were carefully reviewed and selected from 112 sumbissions. The papers address all current aspects in cryptography, security aspects in high performance computing and in networks as well. The papers are divided in topical sections on embedded security; digital rights management; cryptographic protocols; cryptanalysis/side channel attacks; and cipher primitives.
