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Efficient Processing of Deep Neural Networks
This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs). DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics—such as energy-efficiency, throughput, and latency—without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems. The book i...
High Efficiency Video Coding (HEVC)
This book provides developers, engineers, researchers and students with detailed knowledge about the High Efficiency Video Coding (HEVC) standard. HEVC is the successor to the widely successful H.264/AVC video compression standard, and it provides around twice as much compression as H.264/AVC for the same level of quality. The applications for HEVC will not only cover the space of the well-known current uses and capabilities of digital video – they will also include the deployment of new services and the delivery of enhanced video quality, such as ultra-high-definition television (UHDTV) and video with higher dynamic range, wider range of representable color, and greater representation precision than what is typically found today. HEVC is the next major generation of video coding design – a flexible, reliable and robust solution that will support the next decade of video applications and ease the burden of video on world-wide network traffic. This book provides a detailed explanation of the various parts of the standard, insight into how it was developed, and in-depth discussion of algorithms and architectures for its implementation.
Efficient Processing of Deep Neural Networks
This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs). DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics--such as energy-efficiency, throughput, and latency--without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems. The book inc...
In-/Near-Memory Computing
This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data repres...
Data Orchestration in Deep Learning Accelerators
This Synthesis Lecture focuses on techniques for efficient data orchestration within DNN accelerators. The End of Moore's Law, coupled with the increasing growth in deep learning and other AI applications has led to the emergence of custom Deep Neural Network (DNN) accelerators for energy-efficient inference on edge devices. Modern DNNs have millions of hyper parameters and involve billions of computations; this necessitates extensive data movement from memory to on-chip processing engines. It is well known that the cost of data movement today surpasses the cost of the actual computation; therefore, DNN accelerators require careful orchestration of data across on-chip compute, network, and memory elements to minimize the number of accesses to external DRAM. The book covers DNN dataflows, data reuse, buffer hierarchies, networks-on-chip, and automated design-space exploration. It concludes with data orchestration challenges with compressed and sparse DNNs and future trends. The target audience is students, engineers, and researchers interested in designing high-performance and low-energy accelerators for DNN inference.
AI Computing Systems
AI Computing Systems: An Application Driven Perspective adopts the principle of "application-driven, full-stack penetration" and uses the specific intelligent application of "image style migration" to provide students with a sound starting place to learn. This approach enables readers to obtain a full view of the AI computing system. A complete intelligent computing system involves many aspects such as processing chip, system structure, programming environment, software, etc., making it a difficult topic to master in a short time. Provides an in-depth analysis of the underlying principles behind the use of knowledge in intelligent computing systems Centers around application-driven and full-stack penetration, focusing on the knowledge required to complete this application at all levels of the software and hardware technology stack Supporting experimental tutorials covering key knowledge points in each chapter provide practical guidance and formalization tools for developing a simple AI computing system
Internet of Things
The book deals with the conceptual and practical knowledge of the latest tools and methodologies of hardware development for Internet of Things (IoT) and variety of real-world challenges. The topics cover the state-of-the-art and future perspectives of IoT technologies, where industry experts, researchers, and academics had shared ideas and experiences surrounding frontier technologies, breakthrough, and innovative solutions and applications. Several aspects of various hardware technologies, methodologies, and communication protocol such as formal design flow for IoT hardware, design approaches for IoT hardware, IoT solution reference architectures and Instances, simulation, modelling and pr...
An Open-Source Research Platform for Heterogeneous Systems on Chip
Heterogeneous systems on chip (HeSoCs) combine general-purpose, feature-rich multi-core host processors with domain-specific programmable many-core accelerators (PMCAs) to unite versatility with energy efficiency and peak performance. By virtue of their heterogeneity, HeSoCs hold the promise of increasing performance and energy efficiency compared to homogeneous multiprocessors, because applications can be executed on hardware that is designed for them. However, this heterogeneity also increases system complexity substantially. This thesis presents the first research platform for HeSoCs where all components, from accelerator cores to application programming interface, are available under per...
Pixels & Paintings
PIXELS & PAINTINGS “The discussion is firmly grounded in established art historical practices, such as close visual analysis and an understanding of artists’ working methods, and real-world examples demonstrate how computer-assisted techniques can complement traditional approaches.” —Dr. Emilie Gordenker, Director of the Van Gogh Museum The pioneering presentation of computer-based image analysis of fine art, forging a dialog between art scholars and the computer vision community In recent years, sophisticated computer vision, graphics, and artificial intelligence algorithms have proven to be increasingly powerful tools in the study of fine art. These methods—some adapted from fore...
Parallel Processing, 1980 to 2020
This historical survey of parallel processing from 1980 to 2020 is a follow-up to the authors’ 1981 Tutorial on Parallel Processing, which covered the state of the art in hardware, programming languages, and applications. Here, we cover the evolution of the field since 1980 in: parallel computers, ranging from the Cyber 205 to clusters now approaching an exaflop, to multicore microprocessors, and Graphic Processing Units (GPUs) in commodity personal devices; parallel programming notations such as OpenMP, MPI message passing, and CUDA streaming notation; and seven parallel applications, such as finite element analysis and computer vision. Some things that looked like they would be major tre...
