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Synthesis of Finite State Machines
  • Language: en
  • Pages: 287

Synthesis of Finite State Machines

Synthesis of Finite State Machines: Functional Optimization is one of two monographs devoted to the synthesis of Finite State Machines (FSMs). This volume addresses functional optimization, whereas the second addresses logic optimization. By functional optimization here we mean the body of techniques that: compute all permissible sequential functions for a given topology of interconnected FSMs, and select a `best' sequential function out of the permissible ones. The result is a symbolic description of the FSM representing the chosen sequential function. By logic optimization here we mean the steps that convert a symbolic description of an FSM into a hardware implementation, with the goal to ...

Monthly Catalog of United States Government Publications
  • Language: en
  • Pages: 1320

Monthly Catalog of United States Government Publications

  • Type: Book
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  • Published: 1978
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  • Publisher: Unknown

None

Monthly Catalogue, United States Public Documents
  • Language: en
  • Pages: 2248

Monthly Catalogue, United States Public Documents

  • Type: Book
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  • Published: 1978
  • -
  • Publisher: Unknown

None

Synthesis of Finite State Machines
  • Language: en
  • Pages: 382

Synthesis of Finite State Machines

Synthesis of Finite State Machines: Logic Optimization is the second in a set of two monographs devoted to the synthesis of Finite State Machines (FSMs). The first volume, Synthesis of Finite State Machines: Functional Optimization, addresses functional optimization, whereas this one addresses logic optimization. The result of functional optimization is a symbolic description of an FSM which represents a sequential function chosen from a collection of permissible candidates. Logic optimization is the body of techniques for converting a symbolic description of an FSM into a hardware implementation. The mapping of a given symbolic representation into a two-valued logic implementation is called...

Computer Aided Verification
  • Language: en
  • Pages: 520

Computer Aided Verification

This volume contains the proceedings of the Fifth Conference on Computer-Aided Verfication, held in Crete, Greece, in June/July 1993. The objective of the CAV conferences is to bring together researchers and practitioners interested in the development anduse of methods, tools, and theories for the computer-aided verification of concurrent systems. The conferences provide an opportunity for comparing various verfication methods and tools that can be used to assist the applications designer. Emphasis is placed on new research results and the application of existing methods to real verification problems. The volume contains abstracts of three invited lectures and full versions of 37 contributed papers selected from 84 submissions.The contributions are grouped into sections on hardware verification with BDDs, methods and tools, theorem proving, analysis of real-time systems, process algebras and calculi, partial orders, and exploiting symmetry.

Corporate Social Responsibility and Local Community in Asia
  • Language: en
  • Pages: 198

Corporate Social Responsibility and Local Community in Asia

  • Type: Book
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  • Published: 2014-04-03
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  • Publisher: Routledge

The idea of corporations exercising corporate social responsibility has spread from the West and is now firmly embedded in Asian countries and in Asian corporations. The latest trend in corporate social responsibility, evident also in Asia, is for corporations to apply corporate social responsibility to local communities and to those at the bottom of the social hierarchy. This book explores corporations’ social responsibility engagement with local communities in a range of Asian countries. It provides examples of corporate social responsibility in a wide range of industrial sectors, focuses extensively on "social enterprises" and on governments’ and corporations’ schemes to encourage them, considers how relations with employees and with local workforces fit into the pattern of corporate social responsibility, and discusses the question as to how far corporations engage with local communities as a way of developing new markets for their products.

Calendars of the United States House of Representatives and History of Legislation
  • Language: en
  • Pages: 344
Formal Methods in Computer-Aided Design
  • Language: en
  • Pages: 490

Formal Methods in Computer-Aided Design

This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing.

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design
  • Language: en
  • Pages: 248

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design discusses new approaches to better timing-closure and manufacturability of DSM Integrated Circuits. The key idea presented is the use of regular circuit and interconnect structures such that area/delay can be predicted with high accuracy. The co-design of structures and algorithms allows great opportunities for achieving better final results, thus closing the gap between IC and CAD designers. The regularities also provide simpler and possibly better manufacturability. In this book we present not only algorithms for solving particular sub-problems but also systematic ways of organizing different algorithms in a flow to solve the design problem as a whole. A timing-driven chip design flow is developed based on the new structures and their design algorithms, which produces faster chips in a shorter time.

Logic Synthesis and Verification
  • Language: en
  • Pages: 458

Logic Synthesis and Verification

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this boo...