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High Performance Embedded Architectures and Compilers
This book constitutes the refereed proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2009, held in Paphos, Cyprus, in January 2009. The 27 revised full papers presented together with 2 invited keynote paper were carefully reviewed and selected from 97 submissions. The papers are organized in topical sections on dynamic translation and optimisation, low level scheduling, parallelism and resource control, communication, mapping for CMPs, power, cache issues as well as parallel embedded applications.
Big Data and HPC: Ecosystem and Convergence
Due to the increasing need to solve complex problems, high-performance computing (HPC) is now one of the most fundamental infrastructures for scientific development in all disciplines, and it has progressed massively in recent years as a result. HPC facilitates the processing of big data, but the tremendous research challenges faced in recent years include: the scalability of computing performance for high velocity, high variety and high volume big data; deep learning with massive-scale datasets; big data programming paradigms on multi-core; GPU and hybrid distributed environments; and unstructured data processing with high-performance computing. This book presents 19 selected papers from the TopHPC2017 congress on Advances in High-Performance Computing and Big Data Analytics in the Exascale era, held in Tehran, Iran, in April 2017. The book is divided into 3 sections: State of the Art and Future Scenarios, Big Data Challenges, and HPC Challenges, and will be of interest to all those whose work involves the processing of Big Data and the use of HPC.
Computer Architecture Performance Evaluation Methods
Performance evaluation is at the foundation of computer architecture research and development. Contemporary microprocessors are so complex that architects cannot design systems based on intuition and simple models only. Adequate performance evaluation methods are absolutely crucial to steer the research and development process in the right direction. However, rigorous performance evaluation is non-trivial as there are multiple aspects to performance evaluation, such as picking workloads, selecting an appropriate modeling or simulation approach, running the model and interpreting the results using meaningful metrics. Each of these aspects is equally important and a performance evaluation meth...
Bioinformatics and Computational Biology
Bioinformatics and Computational Biology: Technological Advancements, Applications and Opportunities is an invaluable resource for general and applied researchers who analyze biological data that is generated, at an unprecedented rate, at the global level. After careful evaluation of the requirements for current trends in bioinformatics and computational biology, it is anticipated that the book will provide an insightful resource to the academic and scientific community. Through a myriad of computational resources, algorithms, and methods, it equips readers with the confidence to both analyze biological data and estimate predictions. The book offers comprehensive coverage of the most essenti...
Embedded Software and Systems
This book constitutes the thoroughly refereed postproceedings of the First International Conference on Embedded Software and Systems, ICESS 2004, held in Hangzhou, China in December 2004. The 80 revised full papers presented together with the abstracts of 4 keynote speeches and 4 invited talks were thoroughly reviewed and selected from almost 400 submissions. The papers are organized in topical sections on distributed embedded computing, embedded systems, embedded hardware and architecture, middleware for embedded computing, mobile systems, transducer network, embedded operating system, power-aware computing, real-time system, embedded system verification and testing, and software tools for embedded systems.
Instruction-Level Parallelism
Instruction-Level Parallelism presents a collection of papers that attempts to capture the most significant work that took place during the 1980s in the area of instruction-level (ILP) parallel processing. The papers in this book discuss both compiler techniques and actual implementation experience on very long instruction word (VLIW) and superscalar architectures.
Processor and System-on-Chip Simulation
Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.
Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design
With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-pu...
Encyclopedia of Parallel Computing
Containing over 300 entries in an A-Z format, the Encyclopedia of Parallel Computing provides easy, intuitive access to relevant information for professionals and researchers seeking access to any aspect within the broad field of parallel computing. Topics for this comprehensive reference were selected, written, and peer-reviewed by an international pool of distinguished researchers in the field. The Encyclopedia is broad in scope, covering machine organization, programming languages, algorithms, and applications. Within each area, concepts, designs, and specific implementations are presented. The highly-structured essays in this work comprise synonyms, a definition and discussion of the top...
High Performance Computing - HiPC 2006
This book constitutes the refereed proceedings of the 13th International Conference on High-Performance Computing, HiPC 2006, held in Bangalore, India in December 2006. The 52 revised full papers presented together with the abstracts of 7 invited talks were carefully reviewed and selected from 335 submissions. The papers are organized in topical sections on scheduling and load balancing, architectures, network and distributed algorithms, application software, network services, applications, ad-hoc networks, systems software, sensor networks and performance evaluation, as well as routing and data management algorithms.
