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Post-Silicon and Runtime Verification for Modern Processors
The purpose of this book is to survey the state of the art and evolving directions in post-silicon and runtime verification. The authors start by giving an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. They then dive into the presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors, dedicating several chapters to this topic. The presentation of runtime verification solutions follows a similar approach. This is an area of processor design that is still in its early stages of exploration and that holds the promise of accomplishing the ultimate goal of achieving complete correctness guarantees for microprocessor-based computation. The authors conclude the book with a look towards the future of late-stage verification and its growing role in the processor life-cycle.
The Revival of China, Volume 1
This is Volume 1 of the book entitled "The Revival of China". The full book is about the revival of China in the 20th century and the first decade of the 21st century, and has eight parts. This volume contains the first four parts of the full book, and covers the history of overthrowing the Qing Dynasty and the establishment of Republic of China （Part 1），the establishment of the Red Army in countryside bases (Part 2), the Long March of the Red Army (Part 3) and the war against Japanese invasion (Part 4).
Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design
With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-pu...
Automated Technology for Verification and Analysis
This book constitutes the refereed proceedings of the Second International Conference on Automated Technology for Verificaton and Analysis, ATVA 2004, held in Taipei, Taiwan in October/November 2004. The 24 revised full papers presented together with abstracts of 6 invited presentations and 7 special track papers were carefully reviewed and selected from 69 submissions. Among the topics addressed are model-checking theory, theorem-proving theory, state-space reduction techniques, languages in automated verification, parametric analysis, optimization, formal performance analysis, real-time systems, embedded systems, infinite-state systems, Petri nets, UML, synthesis, and tools.
Countryside Bases
This is Part 2 of the book entitled "The Revival of China". The full book is about the revival of China in the 20th century and the first decade of the 21st century. This part of the book records how MAO Ze-dong and ZHU De established the Red Bases in countryside.
Design Automation and Applications for Emerging Reconfigurable Nanotechnologies
This book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed using the runtime reconfigurable features of this nanotechnology.
Cloudonomics
The ultimate guide to assessing and exploiting the customer value and revenue potential of the Cloud A new business model is sweeping the world—the Cloud. And, as with any new technology, there is a great deal of fear, uncertainty, and doubt surrounding cloud computing. Cloudonomics radically upends the conventional wisdom, clearly explains the underlying principles and illustrates through understandable examples how Cloud computing can create compelling value—whether you are a customer, a provider, a strategist, or an investor. Cloudonomics covers everything you need to consider for the delivery of business solutions, opportunities, and customer satisfaction through the Cloud, so you ca...
Debug Automation from Pre-Silicon to Post-Silicon
This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve...
Scalable Hardware Verification with Symbolic Simulation
This book is intended as an innovative overview of current formal verification methods, combined with an in-depth analysis of some advanced techniques to improve the scalability of these methods, and close the gap between design and verification in computer-aided design. Formal Verification: Scalable Hardware Verification with Symbolic Simulation explains current formal verification methods and provides an in-depth analysis of some advanced techniques to improve the scalability of these methods and close the gap between design and verification in computer-aided design. It provides the theoretical background required to present such methods and advanced techniques, i.e. Boolean function representations, models of sequential networks and, in particular, some novel algorithms to expose the disjoint support decompositions of Boolean functions, used in one of the scalable approaches.
Formal Techniques for Networked and Distributed Systems - FORTE 2005
This book constitutes the refereed proceedings of the 25th IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems, FORTE 2005, held in Taipei, Taiwan, in October 2005. The 33 revised full papers and 6 short papers presented together with 3 keynote speeches were carefully reviewed and selected from 88 submissions. The papers cover all current aspects of formal methods for distributed systems and communication protocols such as formal description techniques (MSC, UML, Use cases, . . .), semantic foundations, model-checking, SAT-based techniques, process algebrae, abstractions, protocol testing, protocol verification, network synthesis, security system analysis, network robustness, embedded systems, communication protocols, and several promising new techniques.
