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This book constitutes the refereed proceedings of the 6th International Conference on Computers and Games, CG 2008, held in Beijing, China, in September/October 2008 co-located with the 13th Computer Olympiad and the 16th World Computer-Chess Championship. The 24 revised full papers presented were carefully reviewed and selected from 40 submissions. The papers cover all aspects of artificial intelligence in computer-game playing dealing with many different research topics, such as cognition, combinatorial game theory, search, knowledge representation, and optimization.
Distributed to some depository libraries in microfiche.
The purpose of this workshop was to provide a general forum for distributed systems researchers. Special em- phasis was placed on research activities in distributed operating systems and management of distributed sys- stems. This volume includes a selection of the papers presented at the workshop. They focus on the illustration of existing concepts and solutions in distributed systems research and development, exemplified by case study analyses of various projects. The annex contains the position papers prepared for the panel discussions at the workshop.
This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly. Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that compl...
This book presents the basis for reusing the test vector generation and simulation for the purpose of implementation verification, to result in a significant timesaving. It brings the results in the direction of merging manufacturing test vector generation and verification.