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Pyramidal Systems for Computer Vision
  • Language: en
  • Pages: 391

Pyramidal Systems for Computer Vision

This book contains the proceedings of the NATO Advanced Research Workshop held in Maratea (Italy), May 5-9, 1986 on Pyramidal Systems for Image Processing and Computer Vision. We had 40 participants from 11 countries playing an active part in the workshop and all the leaders of groups that have produced a prototype pyramid machine or a design for such a machine were present. Within the wide field of parallel architectures for image processing a new area was recently born and is growing healthily: the area of pyramidally structured multiprocessing systems. Essentially, the processors are arranged in planes (from a base to an apex) each one of which is generally a reduced (usually by a power o...

Image Analysis and Processing
  • Language: en
  • Pages: 267

Image Analysis and Processing

For the third time the Italian Group on Pattern Recogni tion has organized an International Conference on Image Analysis and Processing (lAP) gathering together the most active groups working in this area in our country. The first International Conference lAP was held in Pavia (1980) and the second one in Selva di Fasano (1982). A selected set of distinguished speakers has been invited to talk about their personal experience and views on industrial applications (H Freeman), the critical analysis of medical image processing (D Rutovitz), the advances of robot vision languages (M Silva) and the availability of AI technology for imI?roving the performance of PR and IP programs (J M Chassery). Four different areas have been covered by the papers submitted and refereed) to the conference first and to a scientific committee next, namely IP Techniques, Multiprocessor Architectures, Robot Vision and IP Applications. A final paper giving the results of a census of the Italian groups is provided showing, with some detail, typical research lines as pursued in working groups both at the University and Industry. About 39 groups are presently active in 12 different places of the peninsula.

Sami Art and Aesthetics
  • Language: en
  • Pages: 346

Sami Art and Aesthetics

  • Categories: Art

During the last five decades we have witnessed an increase in activity among artists identifying themselves as Sami, the only recognised indigenous people of Scandinavia. At the same time, art and duodji (traditional Sami art and craft) have been organized and institutionalized, not least by the Sami artists themselves. Sami Art and Aesthetics discusses and highlights these developments and places them in historical and contemporary contexts for an international audience. At stake are complex, changing terms regarding the creative and the political agencies. The question is not how indigeneity, identity, people, art, duodji, and aesthetics correspond to conventional Western ideas, rather it is how they interact with the Sami and their neighbouring cultures and societies. The volume is written by some of the foremost art historians and literary scholars in Sami art, craft, architecture, culture, and indigenous studies. Artists presented include Johan Turi, Ivar Jaks, Outi Pieski, Folke Fjellstrom, Katarina Pirak Sikku, Geir Tore Holm, and Silje Figenschou Thoresen.

Wafer-Level Integrated Systems
  • Language: en
  • Pages: 456

Wafer-Level Integrated Systems

From the perspective of complex systems, conventional Ie's can be regarded as "discrete" devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach...

Supercomputing
  • Language: en
  • Pages: 416

Supercomputing

Supercomputing is an important science and technology that enables the scientist or the engineer to simulate numerically very complex physical phenomena related to large-scale scientific, industrial and military applications. It has made considerable progress since the first NATO Workshop on High-Speed Computation in 1983 (Vol. 7 of the same series). This book is a collection of papers presented at the NATO Advanced Research Workshop held in Trondheim, Norway, in June 1989. It presents key research issues related to: - hardware systems, architecture and performance; - compilers and programming tools; - user environments and visualization; - algorithms and applications. Contributions include critical evaluations of the state-of-the-art and many original research results.

Future Parallel Computers
  • Language: en
  • Pages: 506

Future Parallel Computers

Organized by the University of Pisa on behalf of the European Strategic Programme for Research and Development in Information Technology (ESPRIT)

Embedded Systems Specification and Design Languages
  • Language: en
  • Pages: 272

Embedded Systems Specification and Design Languages

This book is the latest contribution to the Chip Design Languages series and it consists of selected papers presented at the Forum on Specifications and Design Languages (FDL'07), in September 2007. The book represents the state-of-the-art in research and practice, and it identifies new research directions. It highlights the role of specification and modelling languages, and presents practical experiences with specification and modelling languages

On-Line Testing for VLSI
  • Language: en
  • Pages: 152

On-Line Testing for VLSI

Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.

System Synthesis with VHDL
  • Language: en
  • Pages: 373

System Synthesis with VHDL

Embedded systems are usually composed of several interacting components such as custom or application specific processors, ASICs, memory blocks, and the associated communication infrastructure. The development of tools to support the design of such systems requires a further step from high-level synthesis towards a higher abstraction level. The lack of design tools accepting a system-level specification of a complete system, which may include both hardware and software components, is one of the major bottlenecks in the design of embedded systems. Thus, more and more research efforts have been spent on issues related to system-level synthesis. This book addresses the two most active research ...

Hardware/Software Co-Design for Data Flow Dominated Embedded Systems
  • Language: en
  • Pages: 252

Hardware/Software Co-Design for Data Flow Dominated Embedded Systems

Introduces different tasks of hardware/software co-design, including system specification, hardware/software partitioning, co-synthesis, and co-simulation. Summarizes and classifies co-design tools and methods for these tasks, and presents the co-design tool COOL, useful for solving co-design tasks for the class of data-flow dominated embedded systems. Primary emphasis is on hardware/software partitioning and the co-synthesis phase and their coupling. A mathematical formulation of the hardware/software partitioning problem is given, and several novel approaches are presented and compared for solving the partitioning problem. Annotation copyrighted by Book News, Inc., Portland, OR