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Introduction to Hardware Security and Trust
This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade. Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems. This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of, and trust in, modern society’s microelectronic-supported infrastructures.
Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits
Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing for small-delay defects (SDDs), which can cause immediate timing failures on both critical and non-critical paths in...
Dependable Multicore Architectures at Nanoscale
This book provides comprehensive coverage of the dependability challenges in today's advanced computing systems. It is an in-depth discussion of all the technological and design-level techniques that may be used to overcome these issues and analyzes various dependability-assessment methods. The impact of individual application scenarios on the definition of challenges and solutions is considered so that the designer can clearly assess the problems and adjust the solution based on the specifications in question. The book is composed of three sections, beginning with an introduction to current dependability challenges arising in complex computing systems implemented with nanoscale technologies...
Hardware Security Training, Hands-on!
This is the first book dedicated to hands-on hardware security training. It includes a number of modules to demonstrate attacks on hardware devices and to assess the efficacy of the countermeasure techniques. This book aims to provide a holistic hands-on training to upper-level undergraduate engineering students, graduate students, security researchers, practitioners, and industry professionals, including design engineers, security engineers, system architects, and chief security officers. All the hands-on experiments presented in this book can be implemented on readily available Field Programmable Gate Array (FPGA) development boards, making it easy for academic and industry professionals to replicate the modules at low cost. This book enables readers to gain experiences on side-channel attacks, fault-injection attacks, optical probing attack, PUF, TRNGs, odometer, hardware Trojan insertion and detection, logic locking insertion and assessment, and more.
Test and Diagnosis for Small-Delay Defects
This book will introduce new techniques for detecting and diagnosing small-delay defects in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise.
Principles of Secure Processor Architecture Design
With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book aims to give readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features whi...
Materials for Electronics Security and Assurance
Materials for Electronics Security and Assurance reviews the properties of materials that could enable devices that are resistant to tampering and manipulation. The book discusses recent advances in materials synthesis and characterization techniques for security applications. Topics addressed include anti-reverse engineering, detection, prevention, track and trace, fingerprinting, obfuscation, and how materials could enable these security solutions. The book introduces opportunities and challenges and provides a clear direction of the requirements for material-based solutions to address electronics security challenges. It is suitable for materials scientists and engineers who seek to enable...
Microelectronics, Electromagnetics and Telecommunications
The volume contains 94 best selected research papers presented at the Third International Conference on Micro Electronics, Electromagnetics and Telecommunications (ICMEET 2017) The conference was held during 09-10, September, 2017 at Department of Electronics and Communication Engineering, BVRIT Hyderabad College of Engineering for Women, Hyderabad, Telangana, India. The volume includes original and application based research papers on microelectronics, electromagnetics, telecommunications, wireless communications, signal/speech/video processing and embedded systems.
Robust Computing with Nano-scale Devices
Robust Nano-Computing focuses on various issues of robust nano-computing, defect-tolerance design for nano-technology at different design abstraction levels. It addresses both redundancy- and configuration-based methods as well as fault detecting techniques through the development of accurate computation models and tools. The contents present an insightful view of the ongoing researches on nano-electronic devices, circuits, architectures, and design methods, as well as provide promising directions for future research.
Nanometer Technology Designs
Traditional at-speed test methods cannot guarantee high quality test results as they face many new challenges. Supply noise effects on chip performance, high test pattern volume, small delay defect test pattern generation, high cost of test implementation and application, and utilizing low-cost testers are among these challenges. This book discusses these challenges in detail and proposes new techniques and methodologies to improve the overall quality of the transition fault test.
