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Vibrational Properties of Defective Oxides and 2D Nanolattices
Ge and III–V compounds, semiconductors with high carrier mobilities, are candidates to replace Si as the channel in MOS devices. 2D materials – like graphene and MoS_2 – are also envisioned to replace Si in the future. This thesis is devoted to the first-principles modeling of the vibrational properties of these novel channel materials. The first part of the thesis focuses on the vibrational properties of various oxides on Ge, making it possible to identify the vibrational signature of specific defects which could hamper the proper functioning of MOSFETs. The second part of the thesis reports on the electronic and vibrational properties of novel 2D materials like silicene and germanene, the Si and Ge 2D counterparts of graphene. The interaction of these 2D materials with metallic and non-metallic substrates is investigated. It was predicted, for the first time, and later experimentally confirmed, that silicene could be grown on a non-metallic template like MoS_2, a breakthrough that could open the door to the possible use of silicene in future nanoelectronic devices.
Supermaterials
Proceedings of the NATO Advanced Research Workshop, held at Giens, Hyères, France, September 19-23, 1999
Handbook for Cleaning for Semiconductor Manufacturing
Provides an In-depth discussion of surface conditioning for semiconductor applications The Handbook of Cleaning for Semiconductor Manufacturing: Fundamentals and Applications provides an in-depth discussion of surface conditioning for semiconductor applications. The fundamental physics and chemistry associated with wet processing is reviewed as well as surface and colloidal aspects of cleaning and etching. Topics covered in this new reference include: Front end line (FEOL) and back end of line (BEOL) cleaning applications such as high-k/metal gate post-etch cleaning and pore sealing, high-dose implant stripping and cleaning, and germanium, and silicon passivation Formulation development prac...
Dielectrics in Nanosystems -and- Graphene, Ge/III-V, Nanowires and Emerging Materials for Post-CMOS Applications 3
This issue of ECS Transactions will cover the following topics in (a) Graphene Material Properties, Preparation, Synthesis and Growth; (b) Metrology and Characterization of Graphene; (c) Graphene Devices and Integration; (d) Graphene Transport and mobility enhancement; (e) Thermal Behavior of Graphene and Graphene Based Devices; (f) Ge & III-V devices for CMOS mobility enhancement; (g) III.V Heterostructures on Si substrates; (h) Nano-wires devices and modeling; (i) Simulation of devices based on Ge, III-V, nano-wires and Graphene; (j) Nanotechnology applications in information technology, biotechnology and renewable energy (k) Beyond CMOS device structures and properties of semiconductor nano-devices such as nanowires; (l) Nanosystem fabrication and processing; (m) nanostructures in chemical and biological sensing system for healthcare and security; and (n) Characterization of nanosystems; (f) Nanosystem modeling.
High Mobility and Quantum Well Transistors
For many decades, the semiconductor industry has miniaturized transistors, delivering increased computing power to consumers at decreased cost. However, mere transistor downsizing does no longer provide the same improvements. One interesting option to further improve transistor characteristics is to use high mobility materials such as germanium and III-V materials. However, transistors have to be redesigned in order to fully benefit from these alternative materials. High Mobility and Quantum Well Transistors: Design and TCAD Simulation investigates planar bulk Germanium pFET technology in chapters 2-4, focusing on both the fabrication of such a technology and on the process and electrical TC...
Chemical-Mechanical Planarization of Semiconductor Materials
This book contains a comprehensive review of CMP (Chemical-Mechanical Planarization) technology, one of the most exciting areas in the field of semiconductor technology. It contains detailed discussions of all aspects of the technology, for both dielectrics and metals. The state of polishing models and their relation to experimental results are covered. Polishing tools and consumables are also covered. The leading edge issues of damascene and new dielectrics as well as slurryless technology are discussed.
Handbook of Silicon Wafer Cleaning Technology
The second Edition of the Handbook of Silicon Wafer Cleaning Technology is intended to provide knowledge of wet, plasma, and other surface conditioning techniques used to manufacture integrated circuits. The integration of the clean processes into the device manufacturing flow will be presented with respect to other manufacturing steps such as thermal, implant, etching, and photolithography processes. The Handbook discusses both wet and plasma-based cleaning technologies that are used for removing contamination, particles, residue, and photoresist from wafer surfaces. Both the process and the equipment are covered. A review of the current cleaning technologies is included. Also, advanced cle...
