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VLSI for Artificial Intelligence and Neural Networks
This book is an edited selection of the papers presented at the International Workshop on VLSI for Artifidal Intelligence and Neural Networks which was held at the University of Oxford in September 1990. Our thanks go to all the contributors and especially to the programme committee for all their hard work. Thanks are also due to the ACM-SIGARCH, the IEEE Computer Society, and the lEE for publicizing the event and to the University of Oxford and SUNY-Binghamton for their active support. We are particularly grateful to Anna Morris, Maureen Doherty and Laura Duffy for coping with the administrative problems. Jose Delgado-Frias Will Moore April 1991 vii PROLOGUE Artificial intelligence and neur...
Processor and System-on-Chip Simulation
Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.
Customizable Embedded Processors
Customizable processors have been described as the next natural step in the evolution of the microprocessor business: a step in the life of a new technology where top performance alone is no longer sufficient to guarantee market success. Other factors become fundamental, such as time to market, convenience, energy efficiency, and ease of customization. This book is the first to explore comprehensively one of the most fundamental trends which emerged in the last decade: to treat processors not as rigid, fixed entities, which designers include "as is in their products; but rather, to build sound methodologies to tailor-fit processors to the specific needs of such products. This book addresses the goal of maintaining a very large family of processors, with a wide range of features, at a cost comparable to that of maintaining a single processor. - First book to present comprehensively the major ASIP design methodologies and tools without any particular bias - Written by most of the pioneers and top international experts of this young domain - Unique mix of management perspective, technical detail, research outlook, and practical implementation
High Performance Embedded Architectures and Compilers
This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized into topical sections on a number of key subjects in the field.
Euro-Par 2008 Parallel Processing
This book constitutes the refereed proceedings of the 14th International Conference on Parallel Computing, Euro-Par 2008, held in Las Palmas de Gran Canaria, Spain, in August 2008. The 86 revised papers presented were carefully reviewed and selected from 264 submissions. The papers are organized in topical sections on support tools and environments; performance prediction and evaluation; scheduling and load balancing; high performance architectures and compilers; parallel and distributed databases; grid and cluster computing; peer-to-peer computing; distributed systems and algorithms; parallel and distributed programming; parallel numerical algorithms; distributed and high-performance multimedia; theory and algorithms for parallel computation; and high performance networks.
Embedded Software
This book constitutes the refereed proceedings of the Second International Conference on Embedded Software, EMSOFT 2002, held in Grenoble, France in October 2002. The book presents 13 invited papers by leading researchers and 17 revised full papers selected during a competitive round of reviewing. The book spans the whole range of embedded software, including operating systems and middleware, programming languages and compilers, modeling and validation, software engineering and programming methodologies, scheduling and execution-time analysis, formal methods, and communication protocols and fault-tolerance
High-Performance Embedded Computing
High-Performance Embedded Computing, Second Edition, combines leading-edge research with practical guidance in a variety of embedded computing topics, including real-time systems, computer architecture, and low-power design. Author Marilyn Wolf presents a comprehensive survey of the state of the art, and guides you to achieve high levels of performance from the embedded systems that bring these technologies together. The book covers CPU design, operating systems, multiprocessor programs and architectures, and much more. Embedded computing is a key component of cyber-physical systems, which combine physical devices with computational resources for control and communication. This revised editi...
Architecture of Computing Systems - ARCS 2010
This book constitutes the refereed proceedings of the 23rd International Conference on Architecture of Computing Systems, ARCS 2010, held in Hannover, Germany, in February 2010. The 20 revised full papers presented together with 1 keynote lecture were carefully reviewed and selected from 55 submissions. This year's special focus is set on heterogeneous systems. The papers are organized in topical sections on processor design, embedded systems, organic computing and self-organization, processor design and transactional memory, energy management in distributed environments and ad-hoc grids, performance modeling and benchmarking, as well as accelerators and GPUs.
VLSI for Neural Networks and Artificial Intelligence
Neural network and artificial intelligence algorithrns and computing have increased not only in complexity but also in the number of applications. This in turn has posed a tremendous need for a larger computational power that conventional scalar processors may not be able to deliver efficiently. These processors are oriented towards numeric and data manipulations. Due to the neurocomputing requirements (such as non-programming and learning) and the artificial intelligence requirements (such as symbolic manipulation and knowledge representation) a different set of constraints and demands are imposed on the computer architectures/organizations for these applications. Research and development o...
