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VLSI Synthesis of DSP Kernels
A critical step in the design of a DSP system is to identify for each of its components an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. This essential book covers architectures that offer varying degrees of programmability.
IEEE TENCON 2003
None
Contemporary Computing
This volume constitutes the refereed proceedings of the 5th International Conference on Contemporary Computing, IC3 2010, held in Noida, India, in August 2011. The 42 revised full papers presented together with 7 short papers were carefully reviewed and selected from 162 submissions. The papers are organized in topical sections on: algorithm; applications; systems (hardware and software); biomedical informations; poster papers.
Proceedings
None
Asian Test Symposium
None
Design of Energy-Efficient Application-Specific Instruction Set Processors
After a brief introduction to low-power VLSI design, the design space of ASIP instruction set architectures (ISAs) is introduced with a special focus on important features for digital signal processing. Based on the degrees of freedom offered by this design space, a consistent ASIP design flow is proposed: this design flow starts with a given application and uses incremental optimization of the ASIP hardware, of ASIP coprocessors and of the ASIP software by using a top-down approach and by applying application-specific modifications on all levels of design hierarchy. A broad range of real-world signal processing applications serves as vehicle to illustrate each design decision and provides a hands-on approach to ASIP design. Finally, two complete case studies demonstrate the feasibility and the efficiency of the proposed methodology and quantitatively evaluate the benefits of ASIPs in an industrial context.
