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Dynamic System Reconfiguration in Heterogeneous Platforms
Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
VLSI 2010 Annual Symposium
VLSI 2010 Annual Symposium will present extended versions of the best papers presented in ISVLSI 2010 conference. The areas covered by the papers will include among others: Emerging Trends in VLSI, Nanoelectronics, Molecular, Biological and Quantum Computing. MEMS, VLSI Circuits and Systems, Field-programmable and Reconfigurable Systems, System Level Design, System-on-a-Chip Design, Application-Specific Low Power, VLSI System Design, System Issues in Complexity, Low Power, Heat Dissipation, Power Awareness in VLSI Design, Test and Verification, Mixed-Signal Design and Analysis, Electrical/Packaging Co-Design, Physical Design, Intellectual property creating and sharing.
Components and Services for IoT Platforms
This book serves as a single-source reference to the state-of-the-art in Internet of Things (IoT) platforms, services, tools, programming languages, and applications. In particular, the authors focus on IoT-related requirements such as low-power, time-to-market, connectivity, reliability, interoperability, security, and privacy. Authors discuss the question of whether we need new IoT standardization bodies or initiatives, toward a fully connected, cyber-physical world. Coverage includes the research outcomes of several, current European projects related to IoT platforms, services, APIs, tools, and applications.
Applied Reconfigurable Computing. Architectures, Tools, and Applications
This book constitutes the proceedings of the 19th International Symposium on Applied Reconfigurable Computing, ARC 2023, which was held in Cottbus, Germany, in September 2023. The 18 full papers presented in this volume were reviewed and selected from numerous submissions. The proceedings also contain 4 short PhD papers. The contributions were organized in topical sections as follows: Design methods and tools; applications; architectures; special session: near and in-memory computing; and PhD forum papers.
Cyberphysical Systems for Epilepsy and Related Brain Disorders
This book introduces a new cyberphysical system that combines clinical and basic neuroscience research with advanced data analysis and medical management tools for developing novel applications for the management of epilepsy. The authors describe the algorithms and architectures needed to provide ambulatory, diagnostic and long-term monitoring services, through multi parametric data collection. Readers will see how to achieve in-hospital quality standards, addressing conventional “routine” clinic-based service purposes, at reduced cost, enhanced capability and increased geographical availability. The cyberphysical system described in this book is flexible, can be optimized for each patient and is demonstrated in several case studies.
System Level Design Model with Reuse of System IP
This book addresses system design, providing a framework for assessing and developing system design practices that observe and utilise reuse of system design know-how. The know-how accumulated in the companies represents an intellectual asset, or property ('IP').
Real-Time Embedded Systems
This book is a printed edition of the Special Issue "Real-Time Embedded Systems" that was published in Electronics
System Level Design of Reconfigurable Systems-on-Chip
Describes in a consolidated way the results of a three-year research project, during which researchers from leading european industrial companies and research institutes have been working together. Contributors come from academia and industry, such companies as INTRACOM, VTT and Nokia being represented Proposes brand new approaches based on SystemC and OCAPI-XL that explicitly handle issues related to reconfiguration at the system level Introduces a design flow for designing reconfigurable systems-on-chip Provides a comprehensive introduction to reconfigurable hardware and existing reconfigurable technologies Presents examples on how reconfigurable hardware can be exploited for the development of complex systems Provides useful feedback from the application of the proposed design flow and system level design methods on different real life design cases
Advances in Aeronautical Informatics
The history of flight started with the pioneer era. The introduction of mechanical controls (including hydraulics) then led to the second era. Later, with the utilization of computers and automation in aircraft, we reached the third era. Now, we are moving towards the fourth era of flight, namely Flight 4.0, which is characterized by “smart” and “connected” aircraft that extensively exploit emerging information and communication technologies. Aeronautical informatics is advancing rapidly through the synergy between information and communication technologies and aeronautics. Multi-core avionic platforms, wireless avionics networking, service-oriented architectures and IoT, data scienc...
