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SAT-Based Scalable Formal Verification Solutions
This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. It describes SAT-based model checking approaches and gives engineering details on what makes model checking practical. The book brings together the various SAT-based scalable emerging technologies and techniques covered can be synergistically combined into a scalable solution.
Design for Manufacturability and Statistical Design
Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one of the objectives of this book and an important differentation.
Design for Manufacturability and Yield for Nano-Scale CMOS
This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process. It covers all CAD/CAE aspects of a SOC design flow and addresses a new topic (DFM/DFY) critical at 90 nm and beyond. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
CMOS Biotechnology
Lately, there has been a growing interest in exploiting the benefits of the ICs for areas outside of the traditional application spaces. One noteable area is found in biology Bioanalytical instruments have been miniaturized on ICs to study various biophenomena or to actuate biosystems. These biolab-on-IC systems utilize the IC to facilitate faster, repeatable, and standardized biological experiments at low cost with a small volume of biological sample. The research activities in this field are expected to enjoy substantial growth in the foreseeable future. BioCMOS Technologies reviews these exciting recent efforts in joining CMOS technology with biology.
Nanoelectronic Device Applications Handbook
Nanoelectronic Device Applications Handbook gives a comprehensive snapshot of the state of the art in nanodevices for nanoelectronics applications. Combining breadth and depth, the book includes 68 chapters on topics that range from nano-scaled complementary metal–oxide–semiconductor (CMOS) devices through recent developments in nano capacitors and AlGaAs/GaAs devices. The contributors are world-renowned experts from academia and industry from around the globe. The handbook explores current research into potentially disruptive technologies for a post-CMOS world. These include: Nanoscale advances in current MOSFET/CMOS technology Nano capacitors for applications such as electronics packag...
A Practical Introduction to PSL
This book describes the Property Specification Language PSL, recently standardized as IEEE Standard 1850-2005. PSL was developed to fulfill the following requirements: easy to learn, write, and read; concise syntax; rigorously well-defined formal semantics; expressive power, permitting the specification for a large class of real world design properties; known efficient underlying algorithms in simulation, as well as formal verification. Basic features are covered, as well as advanced topics such as the use of PSL in multiply-clocked designs. A full chapter is devoted to common errors, gathered through the authors' many years of experience in using and teaching the language.
Wafer Level 3-D ICs Process Technology
This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.
Routing Congestion in VLSI Circuits
This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow. The subjects covered include an explanation of why the problem of congestion is important and how it will trend, plus definitions of metrics that are appropriate for measuring congestion, and descriptions of techniques for estimating and optimizing routing congestion issues in cell-/library-based VLSI circuits.
